SEMICONDUCTOR DEVICE TYPES

P-type (holes)
N-type (electrons)
Depletion region
Metal / Gate
Oxide (SiO₂)

PN JUNCTION DIODE

2 Layers · 1 Junction · 2 Terminals

P - - - - + + + + N J1 + + + - - - Anode Cathode A K
Forward bias: External voltage shrinks depletion region, current flows.
Reverse bias: Depletion widens, blocks current (only leakage).

NPN BIPOLAR JUNCTION TRANSISTOR

3 Layers · 2 Junctions · 3 Terminals

N Emitter P Base (thin, lightly doped) N Collector JBE JBC e⁻ injection e⁻ swept → E B C I_B (small) I_C (large) B C E
Key physics: Thin base lets most injected electrons reach collector.
Gain: I_C = β × I_B  (β ~ 50–300).
PNP: Same structure reversed — holes are injected instead.

ZENER DIODE

2 Layers · 1 Junction · Heavy Doping · Reverse Breakdown

P⁺⁺ N⁺⁺ thin W (heavy doping) band-to-band tunneling A K A K
Heavy doping: Thin depletion → Ev(p) aligns with Ec(n) → quantum tunneling.
Breakdown voltage V_Z: Typically 2–6V. Sharp, stable, reversible.
Usage: Voltage regulation, reference, overvoltage protection.

LIGHT-EMITTING DIODE (LED)

PN Junction · Direct Bandgap · Forward Bias · Photon Emission

P (active layer) N (thin window) recombination zone e⁻ injected → P h⁺ → hν hν hν photons escape through N window A (+) K (−) Photon Path 1. Forward bias injects e⁻ from N into P (minority carriers) 2. e⁻ recombine with h⁺ in P-side → radiative recombination → photon 3. Photons travel outward, escaping through thin N window layer A K
Radiative recombination: e⁻ (minority) injected into P recombine with h⁺ → photon with E = E_g.
Direct bandgap required: GaAs, GaN, InGaN (not Si — indirect gap, poor emitter).
Color = bandgap: Red (AlGaAs ~1.4eV) → Green (InGaN ~2.3eV) → Blue (GaN ~3.4eV).
N window: Thin N layer allows photons to escape with minimal reabsorption.

PHOTODIODE

PN/PIN Junction · Reverse Bias · Photon Absorption · Photocurrent

P depletion N (window layer) hν (photon) absorbed e⁻ h⁺ e⁻ h⁺ e⁻→N h⁺→P E-field Anode Cathode V_R (reverse bias) A K
Photon path: Photons enter through N-type window layer, penetrate into depletion/P region where absorbed.
Absorption: hν > E_g creates e-h pairs in/near depletion zone → swept by E-field → photocurrent.
PIN structure: Intrinsic layer widens depletion → more absorption volume → faster response.
Usage: Fiber optics, cameras, solar cells (photovoltaic mode at V=0).

PNP BIPOLAR JUNCTION TRANSISTOR

3 Layers · 2 Junctions · 3 Terminals

P Emitter N Base (thin, lightly doped) P Collector JBE JBC h⁺ injection h⁺ swept → E B C B C E
Key physics: Mirror of NPN — holes are injected from emitter through thin base to collector.
Gain: I_C = β × I_B (same principle, opposite carrier type).
Usage: Complementary to NPN in push-pull stages, level shifting, current sources.

THYRISTOR (SCR)

4 Layers · 3 Junctions · 3 Terminals

P Anode N P Gate N Cathode J1 J2 J3 reverse biased (blocks until triggered) Anode Cathode Gate Equivalent to two cross-coupled transistors: PNP (Q1) NPN (Q2) regenerative feedback Circuit Symbol (SCR): A K G
Trigger: Gate pulse injects carriers → regenerative feedback latches both internal transistors ON.
Latch: Stays on even after gate removed. Must reduce I below IH to turn off.
J2 is the key junction — reverse-biased in blocking, collapses when triggered.

N-CHANNEL JFET

Junction Gate · Depletion Mode · 3 Terminals

N channel P P Source Drain Gate e⁻ flow (I_D) V_GS < 0 → depletion widens → pinch off G D S
Depletion mode: Channel exists at V_GS=0. Negative gate voltage widens depletion, narrows channel.
Pinch-off: At V_GS = -V_P, channel fully depleted → no current.
Voltage controlled: Gate draws no DC current (high input impedance).

N-CHANNEL MOSFET

Metal-Oxide-Semiconductor · Enhancement Mode · 4 Terminals

P substrate (body) N⁺ N⁺ SiO₂ GATE inversion layer (channel) Source Drain Gate Body e⁻ flow when V_GS > V_th G D S
Enhancement mode: No channel at V_GS=0. Gate voltage > V_th creates inversion layer.
Oxide insulated gate: Zero DC gate current → ultra-high input impedance.
Scaling: Dominant transistor type in digital ICs since ~1980s.

NMOS TRANSISTOR

N-channel · Enhancement Mode · Built in P-substrate

P-substrate N⁺ Source N⁺ Drain SiO₂ Gate e⁻ inversion channel electron flow → S D G G D S NMOS symbol
Enhancement mode: No channel at V_GS=0; gate voltage > V_th creates e⁻ inversion layer in P-substrate.
Pull-down switch: Connects output to GND when ON; used in CMOS pull-down network.
Applications: Analog amplifiers, power switching, digital CMOS pull-down.

PMOS TRANSISTOR

P-channel · Enhancement Mode · Built in N-well

N-well P⁺ Source P⁺ Drain SiO₂ Gate h⁺ inversion channel ← hole flow S D G G D S PMOS symbol
Enhancement mode: No channel at V_GS=0; gate voltage < -|V_tp| creates h⁺ inversion layer in N-well.
Pull-up switch: Connects output to V_DD when ON; paired with NMOS for CMOS complementary logic.
Applications: CMOS pull-up network, load switches, power management.

MOS CAPACITOR

Metal-Oxide-Semiconductor · No Source/Drain · 2 Terminals

P-type Si SiO₂ METAL Gate Substrate (Body)
Structure: Simplest MOS device — no source/drain, just gate-oxide-semiconductor stack.
C-V behavior: Accumulation → depletion → inversion as V_G sweeps.
Usage: Test structure for oxide quality, threshold voltage extraction, DRAM storage cell.

MOS RESISTOR (LONG CHANNEL)

MOSFET in Linear Region · V_DS << V_GS - V_th · Ohmic Behavior

P substrate N⁺ N⁺ uniform channel (long L) GATE S D G R_on = L / (W · μ · C_ox · (V_GS − V_th)) Long L → high R → used as active load in analog circuits
Linear region: Small V_DS → channel is uniform → device behaves as voltage-controlled resistor.
R depends on: Channel length L (longer = more R), gate voltage (higher V_GS = less R).
Usage: Active loads in amplifiers, analog MUX switches, programmable resistors.

FinFET

3D Tri-Gate · Sub-14nm · Superior Electrostatic Control

Si substrate oxide isolation Si Fin GATE (wraps 3 sides) S D Source Drain Gate Cross-section view (gate wraps fin on 3 sides) vs. Planar MOSFET: 3-sided gate → better channel control → less leakage → higher drive current at same footprint Used in: Intel 22nm+, TSMC 16nm+, Samsung 14nm+
3D structure: Channel is a vertical "fin" wrapped by gate on 3 sides → superior electrostatic control.
Short-channel effects: Greatly reduced vs. planar MOSFET at same node.
Successor: Gate-All-Around (GAA) / nanosheet at 3nm and below.

VCSEL (VERTICAL-CAVITY SURFACE-EMITTING LASER)

Surface emission · Distributed Bragg Reflector mirrors · Circular beam · Low threshold

N-type GaAs substrate Bottom Bragg Reflector (N) Quantum Wells (active region) oxide aperture Top Bragg Reflector (P) λ (surface emission) P (anode) N (cathode) optical cavity vs. edge-emitting: circular beam, low threshold, wafer-level testing Used in: fiber optics, 3D sensing (Face ID), data centers, LiDAR
CROSS-SECTION (CUT PLANE)
N-type GaAs substrate Bottom Bragg Reflector (N) oxide aperture Top Bragg Reflector (P) λ (surface emission) Quantum Wells (active region) P (anode) N (cathode) optical cavity Cross-section: front half removed to show internal layer stack
Vertical cavity: Light bounces between top/bottom Distributed Bragg Reflector mirrors, emits from surface (not edge).
Distributed Bragg Reflector mirrors: Distributed Bragg Reflectors — alternating λ/4 layers give >99% reflectivity.
Oxide aperture: Confines current to small area → low threshold current (<1 mA).
Advantages: Circular beam (easy fiber coupling), 2D array fabrication, wafer-level testing.

FABRY-PEROT EDGE-EMITTING LASER

Ridge waveguide · Cleaved facet mirrors · Edge emission · High power

N-type InP substrate cleaved facet λ rear facet (HR coat) N-cladding (InP) Multi-Quantum Well active region P-cladding (InP) ridge waveguide (P-contact) optical cavity (L ≈ 200–1000 μm) P (anode) N (cathode) Light amplified along cavity axis, emits from cleaved facet (edge) Used in: Analog CATV Directly Modulated Laser, CD/DVD, pump lasers
CROSS-SECTION (CUT PLANE — PERPENDICULAR TO CAVITY)
N-type InP substrate N-cladding (InP) Multi-Quantum Well active region P-cladding (InP) P contact SiO₂ SiO₂ optical mode (confined) current N contact Ridge confines current and optical mode to narrow stripe
Edge emission: Light amplified along the cavity axis (hundreds of μm), emits from cleaved crystal facet.
Facet mirrors: Cleaved semiconductor-air interface gives ~30% reflectivity; rear facet HR-coated for higher R.
Ridge waveguide: Etched ridge confines current injection and optical mode laterally.
High power: Long gain path → higher output power than VCSEL; elliptical beam needs corrective optics.
Key application: Analog CATV Directly Modulated Laser (DML) — FP cavity provides high linearity for analog signals.

DFB LASER — RIDGE WAVEGUIDE

Corrugated grating at waveguide interface · Single mode · Simple fabrication

AR coat HR coat λ N-type InP substrate N-cladding corrugated grating (Λ≈240nm) λ_B = 2n_eff·Λ P-cladding ridge / P-contact P (anode) N (cathode) Grating corrugated at active/cladding interface — single longitudinal mode Simplest DFB fabrication; used in access networks, short-reach telecom
Structure: Bragg grating etched directly into the top of the active/guide layer before P-cladding regrowth.
Single mode: Grating selects one wavelength — no mode hopping.
Fabrication: Simplest DFB process — one regrowth step after grating etch.

DFB LASER — BURIED HETEROSTRUCTURE

Narrow mesa active region · Current-blocking regrowth · Best performance

AR coat HR coat λ N-InP substrate + grating active mesa (narrow MQW) P-InP blocking N-InP blocking P-InP blocking N-InP blocking P-cladding broad contact P (anode) N (cathode) Active mesa buried in current-blocking regrowth — best thermal + optical confinement Used in: long-haul DWDM, coherent, submarine cables — highest performance DFB
Buried active: Narrow MQW mesa (~1.5 μm wide) buried in P-InP/N-InP current-blocking layers.
No ridge needed: Blocking layers confine current to the mesa — broad area top contact works.
Best performance: Low threshold, high efficiency, excellent thermal dissipation.
Complex fabrication: Requires mesa etch + two regrowth steps — expensive but worth it for telecom.

DFB LASER — INDEX-COUPLED (GRATING ABOVE ACTIVE)

Grating in separate confinement layer · Evanescent coupling · λ/4 phase shift

λ/4 AR coat AR coat λ N-type InP substrate N-cladding MQW active (flat, no grating) grating in SCH (evanescent coupling) λ_B = 2n_eff·Λ P-cladding ridge / P-contact P (anode) N (cathode) evanescent coupling Grating above active — evanescent field couples to grating for wavelength selection λ/4 phase shift ensures true single-mode; both facets AR-coated
Separated grating: Grating etched into separate confinement layer above (or below) active region.
Evanescent coupling: Optical mode tail overlaps grating — index perturbation provides feedback.
λ/4 phase shift: Quarter-wave defect at cavity center breaks degeneracy → guaranteed single mode.
Both facets AR-coated: Grating alone provides all feedback — no need for HR mirror.
Key applications: DWDM telecom, coherent detection, tunable laser arrays, gas sensing.